August 1, 2007
Wafers Now Show Low Bow
Dear Customers and Development Partners,
In recent months, we’ve turned our attention to more “mundane” albeit highly critical matters about GaN-on-Diamond Wafers. First, we address the diamond-induced bow of the wafers, and secondly, we refine our mathematical simulations of real-world GaN-on-Diamond deployment scenarios.
In the fall of this year, our engineers will publish photos and bow-measurements of GaN-on-Diamond wafers that are now less than 200 microns across an entire 2” wafer. In the demonstration, 100-micron thick GaN-on-Diamond wafers are bonded temporarily to a Quartz carrier wafer to ease handling in a manufacturing facility. The carrier bonding is designed to be resilient up to 220°C, and may be dismounted easily. Processing above 220°C would require dismounting from the Quartz followed by re-mounting. Our engineers expect to elevate the resilience temperature of the carrier bonding to 900°C by the end of the 2007.
The other feature of our new carrier bonding scheme is its enforcement of a low bow across the wafer. The Quartz carrier consistently maintains a bow ceiling of 200-microns. Rapid progress in the lab has been made here in bringing the bow down to silicon standard levels; and new results are expected to be announced before the end of the year.
Finally, our engineers have recently modeled several real-world system scenarios that show the impact of diamond on GaN-based electronic devices. In the Simulations Work**, four critical questions are considered: a) given various materials and heat-sink structure, what is the lowest operating temperature that a transistor can sustain, b) how wide does a heat-spreader or heat-sink need to be so that heat flow is not constrained by a temperature-controlled destination, c) using GaN-on-Diamond as a heat-spreader, how thick does the diamond substrate need to be so that significant reduction in peak operating temperature is achieved. In the most conservative scenario, the results are dramatic and bring substantial opportunities for high-temperature electronics designers who have grappled with the perennial heat-problem since the dawn of the modern micro-electronics era.
Please stay tuned for more updates in the months to come.
Warm Regards,
Felix Ejeckam
CEO
** PPT downloads |
